What you will learn:
- What emerging technologies are gearing up to potentially support memory space?
- The current state of NOR flash and SRAM.
- The overriding factor of cost and its impact on the success of a technology.
The memory industry is at a strange turning point. DRAM process migrations seem to have slowed down and there is talk of moving to 3D…NAND flash has already gone through a relatively painful 3D transition and now works extremely well as 3D memory…and CMOS logic has reached process geometries which cannot support on-chip memory.
“WHAT?” you say about this last point. What does this have to do with discrete memory chips, and who says memory can’t be supported on CMOS logic? Well, that’s an important point, so let’s take a look at it.
NOR Flash stops at 28 nm
Most MCUs include NOR flash for their code store, as do many other SoCs. NOR is cheap and is available on almost all foundry CMOS logic processes. This has been the case for decades. But no one has developed a way to do inexpensive NOR flash on a FinFET process, so NOR is not available at process geometries finer than 28 nm. This results in the leveling of the red line in Figure 1which represents the relative cost of NOR embedded in process reductions.
This leveling may not be a problem if the MCUs do not migrate beyond 28 nm, and as long as none of the other SoCs that use NOR exceed 28 nm. History tells us that is unlikely.
Some MCU designs that have already gone beyond 28 nm use external serial NOR chips to carry downloaded-on-demand code to the MCU’s SRAM caches. Although this may be expensive, since SRAM used six transistors per bit and NOR only uses one, it solves the current problem, and serial NOR chips are quite cheap.
But this is only a temporary solution, as the SRAM is also challenged.
SRAM is not far behind
As processes shrink, it becomes increasingly difficult to shrink SRAM along with the process. The IEEE International Conference on Semiconductor Circuits (ISSCC) tracks SRAM bit sizes in a historical table updated annually.
The data in this graph, which ranges from 90 nm to 5 nm, shows that the SRAM cell area in the research chips has shrunk by an average of 17% per process node while the process has shrunk by an average of 21%. At around 20 nm, in some processes, the size and cost of SRAM stop decreasing altogether (blue line in Fig. 1). Either way, it’s less economical to shrink SRAM than it makes sense, making SRAM more and more expensive (as a share of overall chip costs) over time.
The industry seems to be in need of a new memory technology that will allow designers to scale down their MCUs and SoCs with process advancements and not have to worry about rearranging their memory system or incurring cost improvement under -optimal.
Is there anything that can be used to solve this puzzle?
Emergent memories to the rescue
In fact, there are, and it comes in the form of emerging memories – those memories that aren’t common today, but could allow the industry to continue to drive down chip costs through the reduction process. (black line in Fig. 1). These emergent memories are the subject of a new report from Objective Analysis and Coughlin Associates: Emerging memories enter the next phase. This article is based on a small fraction of the information contained in the 231-page report.
The main emerging memory technologies today are PCM, MRAM, FRAM and ReRAM. Each has already been in production and shipping for over five years. Several more are in development in hopes of making their mark in the industry.
In their discrete form, as standalone memory chips, these products sold in niches and did not make big inroads largely due to cost. A paradox prevents them from making great breakthroughs: they must be cheaper than consumer memory (DRAM, SRAM, NOR and NAND flash and EEPROM) to be accepted by the general public, but until they are delivered in volumes comparable to established technologies, they remain more expensive than these established technologies. For years, this prevented their growth and relegated them to market niches.
However, in embedded applications such as MCUs and SoCs, where a brick wall prevents the use of NOR flash, these technologies are gaining acceptance. It is also likely that their platelet volume will undergo a dramatic increase in the near future.
With this understanding, we were able to compile a 10-year memory revenue forecast that projects the annual revenues of the emerging embedded and standalone memories featured in Figure 2, excerpt from the report. We had to use a semi-logarithmic chart to allow the early years to simply appear, since they are so small today.
The chart shows memory emerging as MRAM, but in reality it’s too early to tell which technology will actually win the race. What we do know is that there is only room for one of them to achieve significant success, and the others will continue to serve niche markets.
While NAND flash and DRAM revenues are growing very modestly, thanks to the maturity of these technologies, the MRAM line is growing at a high rate of 66%, which is expected to reach $44 billion by the end of 2032. forecast window. Note that the MRAM line represents combined discrete and on-board memory.
Economies of scale are essential
The most important determinant of the success of any memory technology is cost, and cost can only be reduced by optimizing two factors: processing technology and wafer volume. The second of these is one of the main reasons for Intel’s recent announcement that Optane was to be “liquidated”.
For discrete memory chips, this fact presents an almost impenetrable barrier to widespread adoption. With the help of embedded memories, this shouldn’t be such a big deal for tomorrow’s emerging memory technology.
Economies of scale count the slices of onboard memory in the volume equation. Therefore, high-volume production of SoC and MCU wafers that include MRAM, for example, would at the same time reduce the cost of producing discrete MRAM. As a result, its market could grow faster than without this embedded element. This process feeds on itself, to more quickly reduce the costs of emerging technology that would occur without this integrated element.
Ultimately, we expect to see rapid growth in emerging memory over the next decade in both embedded and discrete forms, rising to a level that puts it in competition with established technologies in ‘today.